Altera_Forum
Honored Contributor
9 years agoCyclone IV IBIS Model
Hi,
i'm performing a board simulation that use a Cyclone IV FBGA-484. I need to simulate an address line (50 ohm impedance trace) from FPGA (pin A9 - IO/DIFFIO_T24n) to an SRAM. The VCCIO is 3.3V for the bank. The net is in the Bank 8 (top bank) so according to IBIS model user guide i need to select a model with <I/O> field that start with "c". What is the best model to use to simulate this net? Do i need a model with the 50ohm OCT? Thanks