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The upstream signal from fpga2->fpga1 is needed only for synchronization (it is only a pulse generated every 15ms). But i want to send it through GXB because i am short on GPIOs.
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Keep in mind that using the GXB channels might not be a simple matter of just toggling the I/O pin.
For example, if you are forced to use the ALTGX component, and it has a minimum data rate of say 1Gbps, then you will have to construct your pulse from a serial bit stream.
For example, if you want a 1ms long pulse every 15ms, at a transceiver lane rate of 1Gbps (1ns per bit), you'll need to transmit 1e6 ones followed by 14e6 zeros. You could actually generate your pulse at a lower clock frequency and then serialize it, i.e., oversample a 1-bit signal in the FPGA by 1000x.
The point is it might be a little more complicated. Make sure to synthesize a design to check whether you can do it the easy way, or the hard way :)
Cheers.
Dave
Honored Contributor
