Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi
you are wright. For transmission i will have to have use some sort of buffer cml-> lvds. Basically my system has two fpga boards. On one board there is a ccd sensor connected to fpga1. Fpga1 then downstreams pixels through LVDS to the second board. On second board i have fpga2 (cyclon iv gx) and usb device to transfer data to pc. As you have noticed, between fpga1 and fpga2 there is lvds connection. Fpga1 produces clock, sync and data signal (clk1, data1 and data0 in my previous post) which are coded by me. The upstream signal from fpga2->fpga1 is needed only for synchronization (it is only a pulse generated every 15ms). But i want to send it through GXB because i am short on GPIOs. I am looking for cml-->lvds buffers. I haven't found any yet. Regards