Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Cyclone IV GX LVDS clock input resistor termination

Hi Altera experts, I am designing using the EP4CGX15BF14C8 (I have the transceiver dev board to try my design). Question I want a reference clock for the transceivers so I use a 125Mhz osc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

The suggested REFCLK interface can be found in the Cyclone IV hardware manual under table 1–5. refclk i/o standard support and Figure 1-22 and 1-23.