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Altera_Forum
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15 years ago

Cyclone IV GX LVDS clock input resistor termination

Hi Altera experts, I am designing using the EP4CGX15BF14C8 (I have the transceiver dev board to try my design). Question I want a reference clock for the transceivers so I use a 125Mhz osc...
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Altera_Forum
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15 years ago

Hi,

I have the same concern about the PCIe refclk termination and coupling. We are using the cyclone-IV GX device with 4x PCI express. Earlier for xilinx part, we have used LVDS standard for REFCLK and it was ok. For altera the refclk reciver is HCSL standard ?.

Thanks

Sharan