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Altera_Forum's avatar
Altera_Forum
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12 years ago

Cyclone IV E Unused I/O configuration

Hi,

We are using Cyclone IV E EP4CE30F23C8 in our design.

Based on Cyclone device pin connection guidelines document(PCG-01008.pdf), all unused signals we have left them unconnected on the PCB except the signals mentioned in the attachment ''fpga_pins.doc".

Now, we would like to know the recommended unused I/O pin configuration that needs to be set using Quartus II software for the following type of signals on my PCB.

1. Unused pins which are left unconnected on the PCB

2. Unused pins which are connected directly to GND on the PCB(Mentioned in the attachment ''fpga_pins.doc" based on PCG-01008.pdf)

The options that are available in Quartus tool are

a. As input tri-stated

b. As input tri-stated with bus hold circuitry

c. As input tri-stated with weak pull-up

d. As output driving an unspecified signal

e. As output driving ground.

Please recommend the unused I/O configuratin option(s) that needs to be selected in the Quartus for the above two types of unused pin on my PCB.

Regards,

Thulasi

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    The setting you refer to applies to ALL I/O that is not explicitly identified in your design. So, it must suit both those signals you've connected to GND and the others.

    The first thing to mention is that all the pins you've identified are dual purpose and the primary function of all (except the clocks) is general purpose I/O. So, unless you require the specific functions available - DEV_CLRn, CLKUSR, etc. - and you specify this in your Quartus project, then they will simply remain unused I/O. The clock signals will remain unused inputs.

    By tying the signals you mention to ground you have already designed a board on which you cannot use the dedicated functions the pins offer. For example: if, in your project, you specify that you want to use DEV_CLRn and it's tied to GND on the board, your FPGA will do nothing, ever. This is perfectly OK :) - if you don't require this function and you're not intending to use this pin as I/O then you've done the right thing.

    Based on the information you've offered I recommend you select option a) 'inputs tri-stated', unless you really have a board which has been specifically designed with the intention of selecting e) 'outputs driving ground'. This option offers various noise benefits but is typically only used once a design has been thoroughly proven through testing and the PCB re-spun accordingly. Don't use option d) based on the fact you've grounded some of the I/O. Options c) and d) offer you nothing as the majority of your unused I/O is unconnected.

    Regards,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    I suggest to stay with the Quartus default for most FPGA families - tristated with weak pull-up. Leaving unconnected inputs floating can cause increased supply currents.