Cyclone IV: DDR2 DM pins fixed?

Are DM pins fixed to a specific pin or can they use any of the DQ pins within the 8x group as well? In the XLS pin information file, there's specific DM pins. However, in Quartus, these DM pins just show up as Q. Running I/O assignment analysis gives no warnings or errors if I assign DM to a random DQ pin and DQ to the DM pin. As far as I know it compiles just fine. So should I just go by what Quartus lets me do?

edit: Oh, the manual states:

"In Cyclone IV devices, the DM pins are preassigned in the device pinouts. The

Quartus II Fitter treats the DQ and DM pins in a DQS group equally for placement

purposes. The preassigned DQ and DM pins are the preferred pins to use."

I guess I'll just stick with the preassigned pins.