cyclone IV configuration: VCCIO8 connection

Thanks Dave for your post.

Actually, following that philosophy (nothing to loose), the device did manage to boot a couple of times after connecting A1 and then the configuration failed (nSTATUS low again).

Given the measured impedance between A1, C4 and C7, those must be connected to the same rail, and given that no I/Os are connected to this bank in my design, I'm just wondering if the in-rush current at power-up is not too large to be handled by only one wire-bond.

Putting a 1000uF capacitance on that pin did not help (nor replacing the FPGA).

I know that not connecting VCCIO8 is probably not something anyone would do after reading carefully the datasheet, however I was just curious if anyone found his way around that issue...