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Altera_Forum's avatar
Altera_Forum
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15 years ago

Cyclone I/O reconfiguration

Hi all:

I have seen a document today about I/O reconfiguration:

http://www.altera.com/literature/wp/wp_morphio_reconfig.pdf

I am not sure I get the meaning of this.

I have a Design using LVDS interface which consumes a lot static power. I wonder if I can use the tech in this document to reconfigure the LVDS I/O dynamically.

Thank you

:)

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Can you tell which LVDS I/O function (input, true LVDS output, E_1R, E3R) "consumes a lot static power" and how much? I wasn't aware of it yet.

    Regarding "MorphIO", it's clearly restricted to IO configuration changes through JTAG interface, and I think, the side effects are not acceptable for most designs.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    Can you tell which LVDS I/O function (input, true LVDS output, E_1R, E3R) "consumes a lot static power" and how much? I wasn't aware of it yet.

    Regarding "MorphIO", it's clearly restricted to IO configuration changes through JTAG interface, and I think, the side effects are not acceptable for most designs.

    --- Quote End ---

    I didnot use the ALTLVDS. I have two transmiters and two receivers. And I use ddr_in and ddr_out connect to the pins which are labeled with 'LVDS' in the pin assignment. The receivers use the internal 100 ohm resistor and the transimeters use three external resistor added next to the FPGA.

    By 'consuming a lot power', I mean even there is no data on the lvds link, the current is always there. My purpose is to reduce the power of the whole design. And now the LVDS interface is one of the big part of power
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    O.K., the LVDS_E_3R resistor circuit has of course a considerable power dissipation. If you don't run the LVDS output at highest speed, you can implement it as a bus LVDS driver and tristate it while it's not required.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    O.K., the LVDS_E_3R resistor circuit has of course a considerable power dissipation. If you don't run the LVDS output at highest speed, you can implement it as a bus LVDS driver and tristate it while it's not required.

    --- Quote End ---

    What is bus lvds interface?

    Actually my intention is also to tri-state the lvds interface. But I cannot find such function in cycloneII.

    Sorry I am kind of new to this

    Thanks