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Can you tell which LVDS I/O function (input, true LVDS output, E_1R, E3R) "consumes a lot static power" and how much? I wasn't aware of it yet.
Regarding "MorphIO", it's clearly restricted to IO configuration changes through JTAG interface, and I think, the side effects are not acceptable for most designs.
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I didnot use the ALTLVDS. I have two transmiters and two receivers. And I use ddr_in and ddr_out connect to the pins which are labeled with 'LVDS' in the pin assignment. The receivers use the internal 100 ohm resistor and the transimeters use three external resistor added next to the FPGA.
By 'consuming a lot power', I mean even there is no data on the lvds link, the current is always there. My purpose is to reduce the power of the whole design. And now the LVDS interface is one of the big part of power
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