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Altera_Forum
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19 years ago

Cyclone III RAM Question

Okay, so the Cyclone III RAM has been changed from an M4K block to an M9K block. Why was this change made? Most of the FPGA designers I know are using a lot of distributed RAM, so it is counter-intui...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

Larger memories make more efficient the majoraty of the projects, but if you use smal memories, you can set Quartus to divide the memory block, depending on your project and the performance you need you can do this in VHDL or Verilog too, using a personal ofset to do so.