Altera_ForumHonored Contributor17 years agoCyclone III problem with USB blaster JTAG communication Hi all I've spent the last week debugging the jtag connection between the fpga and the usb blaster.:mad: I finally found something that is wrong.:) In JTAG there are 4 signals.. The fi...Show More
Recent DiscussionsDK-DEV-AGI027-RA QSPI Verification FailsCyclone 5 SoC FPGA Bank Supply PrerequisiteAGILEX 5 Migration issueTo INTEL - Request for Compliance Data from Analog Devices, IncArria 10 GX RX max intra-differential pair skew