Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

cyclone iii problem with ddr sdram pin

i use altmemddr with sopc builder .

when i compile the **.bdf ,I got error as below

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_clk_reset_ciii:clk|altddio_bidir:DDR_CLK_OUT[0].ddr_clk_out_p|ddio_bidir_cmg:auto_generated|ddio_outa[0]" feeding the pin "ddr_clk" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[7]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[7].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[6]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[6].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[5]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[5].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[4]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[4].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[3]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[3].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[2]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[2].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[1]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[1].dq_obuf" has multiple fan-outs

Error: The DDIO_OUT WYSIWYG primitive "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dq_ddio_dataout[0]" feeding the node "c310:inst1|altmemddr:the_altmemddr|altmemddr_controller_phy:altmemddr_controller_phy_inst|altmemddr_phy:alt_mem_phy_inst|altmemddr_phy_alt_mem_phy_ciii:altmemddr_phy_alt_mem_phy_ciii_inst|altmemddr_phy_alt_mem_phy_dp_io_ciii:dpio|dqs_group[0].dq[0].dq_obuf" has multiple fan-outs

please help me ,thank you !

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    I had similar errors that all went away when I assigned the symbol lines to pins.

    I have reduced mine down to one error now:

    Error: The DDIO_OUT WYSIWYG primitive "NiosIIProcessor:inst5|altmemddr_0:the_altmemddr_0|altmemddr_0_controller_phy:altmemddr_0_controller_phy_inst|altmemddr_0_phy:alt_mem_phy_inst|altmemddr_0_phy_alt_mem_phy:altmemddr_0_phy_alt_mem_phy_inst|altmemddr_0_phy_alt_mem_phy_clk_reset:clk|altddio_bidir:DDR_CLK_OUT[0].ddr_clk_out_p|ddio_bidir_cmg:auto_generated|ddio_outa[0]" feeding the pin "DDR_CLK_P" has multiple fan-outs

    There is a reset_CLK_n.... signal that I did not know what to do with since the CIII Starter Kit did not use this line but it may be unrelated to my problem not sure since I changed the symbol to make the reset_CLK_n line unused. I will search the Megafunction docs tomorrow but if anyone knows off the top of their head what the problem is or what I am suppose to do with the reset_CLK_n... line I would appreciate it.

    Cheers
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi there,

    Another newbie to this FPGA, using the NiosII on CIII Dev Kit with QII Web Ed. 9.0sp2

    I'm seeing this problem too, and am hoping you found a solution and wouldn't mind sharing it with me?

    Cheers,

    Erik
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi ebrockhoff,

    The solution was to use the "OUTPUT_ENABLE_GROUP" keyword. Easies way is to run a tcl script that corresponds to your hardware. For example, if you are using an Altera Dev Kit, there will be tcl script that will do this for you in the files/directories that are created after you install the software associated with your Altera Dev Kit. In summary:

    1. tcl script files are the files that end in *.tcl

    2. In Quartus II go to Tools | Tcl Scripts....

    3. View the Tcl Scripts that correspond to your Altera Dev Kit hardware with DDR and use the "OUTPUT_ENABLE_GROUP" keyword.

    By the way, you can also view and modify the tcl files with note pad or any other text editor if you want.

    If this helped you in anyway please add to my rep.

    Cheers,

    Max
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    --- Quote Start ---

    Hi ebrockhoff,

    The solution was to use the "OUTPUT_ENABLE_GROUP" keyword. Easies way is to run a tcl script that corresponds to your hardware. For example, if you are using an Altera Dev Kit, there will be tcl script that will do this for you in the files/directories that are created after you install the software associated with your Altera Dev Kit. In summary:

    1. tcl script files are the files that end in *.tcl

    2. In Quartus II go to Tools | Tcl Scripts....

    3. View the Tcl Scripts that correspond to your Altera Dev Kit hardware with DDR and use the "OUTPUT_ENABLE_GROUP" keyword.

    By the way, you can also view and modify the tcl files with note pad or any other text editor if you want.

    If this helped you in anyway please add to my rep.

    Cheers,

    Max

    --- Quote End ---

    Hi all, especial with Max,

    I try with your soution. But I do not understand how to use the "OUTPUT_ENABLE_GROUP" keyword. I searched it in file .tcl - and what are the next steps ?