Forum Discussion
Cyclone III not configuring
I have a 144 pin cyclone 3 that I'm trying to get working in a board design I've done. It is not configuring. I can see the TCK on the oscilloscope but no TDO data comes back from the FPGA.
The nConfig and nStatus pins are both high and the CONF_DONE flag is low. I went through the altera trouble shooter but with no luck. One issue is that a ground pin and VCCA pin were shorted together when I first put the chip on the board. It got really hot when I turned it on and the voltage levels were screwed up. I'm not sure if I fried the chip. CONF_DONE is pulled high with a 10k resistor so the fact that it is low made me think the chip was still good. I've ordered some more chips and I'll try them out if I figure something else out first. Thanks.13 Replies
- Altera_Forum
Honored Contributor
It's working! Thanks for everyone's help. I think it was definitely the bottom slug. I did a whole new board and put a lot of paste on the bottom. I didn't initially realize how much clearance there was between the board and the pad, so I think I didn't used enough paste the first time. Thanks again.
- Altera_Forum
Honored Contributor
I don't think just having VCCA at ground should hurt anything. I would suspect that the center pad isn't making contact. The center pad is the ground return for the core. The ground pins are only the port driver and PLL grounds.
I've soldered other parts with a ground slug and it takes a LOT of heat to get the board and plane up to temperature. If you're hand stuffing boards the hole is a good idea. If you are going to stuff more boards I would only solder 2 pins to hold the part in place and then solder the ground. With only two pins soldered you can verify that the ground slug is soldered in place by trying to wiggle the part around. Once you know the ground is soldered then do the rest of the pins. - Altera_Forum
Honored Contributor
Yeah, I have 0 ohm resistors there. I was thinking of putting inductors there as a way to try to control the rise time of the voltages. They are 0603 resistors.
They have a low power rating which I was concerned about, but so far just trying to load in a really simple program I haven't seen any indication that they are failing. I have some ferrite beads with a 4 A rating that I can put there if it turns out to be a problem. - Altera_Forum
Honored Contributor
Oh yeah. Hopefully those were just placeholders for a real current sense resistor. What is the package size on those?
Jake - Altera_Forum
Honored Contributor
What are the 1K resistors in series with your voltage regulator outputs? Are they actually zero ohm jumpers loaded in those locations?
- Altera_Forum
Honored Contributor
There is still no signal on TDO
I think the ground connection is good on the pad now. The board design is probably pretty bad. I have a double sided board so I think there are problems with ground return paths and digital and analog power isolation. I figured that I could still get it to configure even if I couldn't get performance at high frequency operation. I posted the schematic. I have a jumper to control the VCCIO voltage between 2.5 and 3.3 V. I've tried to use both. Do you know what the transition time is for the TCK for the JTAG circuitry? I've been trying to analyze it on my oscope. It seems to change frequency. I tried to trigger on over shoot but I only have a 50Mhz scope though so I might not be seeing everything correctly on those lines. One more thought. I measured the power on rise time of the voltages and it was around 135 us. I know there are some comments about voltage rise time in the configuration documentation but I wasn't quite sure how this would affect the start up of the device. - Altera_Forum
Honored Contributor
Are you still getting no TDO on the oscope?
I can only see three possibilities: 1 - You're still not getting a good ground on that pad. 2 - Your design has a flaw. You could post your schematic and we could see if there are any issues. 3 - Your JTAG signal integrity has a problem. In this case, adding caps as indicated rodwill or source series terminators on the JTAG lines (my preference) may fix it. Jake - Altera_Forum
Honored Contributor
The CONF_DONE pin has a 10k pull up resistor as does nCONFIG, nStatus and INIT_DONE. The FPGA does not auto detect in QII.
So I replaced the FPGA with a new one, and I tried soldered the middle pad this time. Now when I bring up the power I get nCONFIG, CONF_DONE, INIT_DONE all high, and nStatus is low. It still does no configure. - Altera_Forum
Honored Contributor
it is possible that you put a transistor in config_done pin to drive an led to
monitor the config_done pin.remove the transistor if it is like something that. - Altera_Forum
Honored Contributor
Are you detecting the Cyclone when you try the Auto Detect on quartus programmer?
Once time i had a problem with jtag configuration and i solved the problem with caps ~ 100pF on TCK, TDO and TDI ( between these and GND).