Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHi Happy420,
In SOPC builder (or Qsys), you have added a "epcs_flash_controller" module. This module has a ROM memory in which the "epcs_controller_boot_rom.flash" is stored. This memory contains some code given by altera to load your nios program from the epcs to the processor RAM memory. You don't need to change anything on it. Just tell your processor to start from this memory with the processor's reset_vector set on the epcs_flash_controller. To store your program in the epcs, you could try this method I use : http://www.alteraforum.com/forum/showpost.php?p=127299&postcount=2 For your problem with the nCS pin continuously toggling, It could be that you only have write the nios program in the epcs, but not the VHDL. The second ligne creates a flash file with the elf file at an offset the size of the vhdl.flash file. So in your hex file, you have only the nios code beginning at a non zero address. You could check if CONF_DONE pin rise or not. Regards