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Altera_Forum
Honored Contributor
19 years agoCyclone III max I/O frequency
Hi, I´m using a PLL to generate a 250Mhz clock with a phase shift of 2,7ns on a CylconeIII EP3C25(-8) I want to provide this clock on a pll output pin with SSTL 2,5V standard. In q...
Altera_Forum
Honored Contributor
19 years ago(I'm guessing that you are driving at 1.8V levels on a dedicated clock output).
Have a look at : "Maximum Output Toggle Rate on Cyclone III Devices (MHz)" in here: http://www.altera.com/literature/hb/cyc3/cyc3_ciii52001.pdf (http://www.altera.com/literature/hb/cyc3/cyc3_ciii52001.pdf) You may have to use a higher speed grade.