Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Cyclone III driving a FET

Hi, I'm just wondering... What is the electrical purpose in adding a series resistor between an I/O of an FPGA and a PMOS gate? The PMOS switched at frequency of 1Hz. Thank you all, Boris...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

You want to avoid the current peaks created when driving the FET input capacitance and possibly want to slow down the switch output rise time. Setting the output drive strength to minimum without an external reistor máy be already sufficient.