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Altera_Forum
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13 years ago

Cyclone II PS configuration problem

Hi, Hope someone can help me. I have a PCIe card that has been in production since 2007 and now I am getting configuration problems for the EP2C5F256C8 Cyclone II. Basically in some PC's it doe...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi Dave,

Look at this document;

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)

Page 37 has the timing diagram you are interested in, and the following pages have example scope traces (yes, this is for PCI hardware, but the requirements are the same for PCIe).

You need to take the same measurements inside a working PC and a non-working PC.

The main timing parameter your hardware should meet is; the PCIe IP should be ready for BIOS transactions *before* PCIe RST# deasserts. If you cannot meet that timing, then the board will not be visible at first power-on. If the user hits the reset button (no power cycle) or does a restart, then the board will be visible on the PCIe bus, since it will not have to configure the FPGA in that case.

Cheers,

Dave