Forum Discussion
Altera_Forum
Honored Contributor
19 years agoCyclone II programming and verification using JTAG
Hi people, I'm a software engineer and quite new to Altera. For our new product we have an ARM9 processor, Flash memory connected to this processor, Linux 2,4 running and an Cyclone II FPGA f...
Altera_Forum
Honored Contributor
19 years agoSorry about the question about the exposed to the elements query, I have seen all sorts of interesting question on this forum, and so I assume nothing and ask everything.
I just re-downloaded the document. A search for SEU (no quotes) reveals a hit on page 93 of the pdf file. Chapter 3, page 7 as I explained above. The Application Note you stumbled across is also referenced just below that section of the Users Guide - good find. Re-read the AN, as Igot a little confused as to what they were trying to tell me on the first pass read. The JTAG interface can be used to load the part, and there is a CRC instruction that can be used to get at the CRC storage location. THat is all they are saying there. THe rest of the document goes on to explain the automatic in the background CRC checking that can be turned on in the device. (Note that the memory contents and I/O configuration are NOT a part of that circuitry.) I do NOT believe Altera provides Readback of the internal configuration for their devices. I hope this help.