Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Cyclone II - losing configuration after power off

Hi. I programe FPGA through JTAG (MSEL0, MSEL, nCE, DCLK0->GND; nCONFIG->VCC; nSTATUS, CONFIG_DONE->VCC through resistor). I'm using QuartusII (Device & Pin Options: Configuration scheme: PS - I c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

The FPGA is an SRAM based device.

As such, when you turn off the power, it will lose the design you JTAG download to it!

If this is a development board, it might then load a design that is in the onboard existing prom, not sure if that is your case here.

It does not seem like there is anything wrong here.