Occasional Contributor
Occasional ContributorThank you, Fakhrul, for your response and for looking into this.
I would like to provide an update. Just before your reply was posted, I independently identified a flaw in my own logic design—specifically within the state machine implementation.
The root cause was a side effect triggered by a newly extended specification. To suppress this side effect, I implemented a fix, but I overlooked the fact that it also impacted unrelated operation modes. Because these modes were supposedly unrelated, the bug went unnoticed for a year, making it difficult to trace the cause when the issue finally arose. It was a classic oversight on my part.
I have since corrected this bug, and I have confirmed that the boards (4 units tested so far) are now performing state transitions correctly as expected. This logic update has resolved the issues described in Phenomena 2, 3, and 4.
Regarding Phenomenon 1 (the spontaneous behavior change after storage), the cause remains unexplained. While I cannot reproduce it at my office, the factory staff are certain that the failure occurred as described. However, since the board returned to normal operation after a re-write and is currently stable, I have decided to conclude my investigation of this specific case for now.
As the primary issues have been resolved by the logic correction, I will be closing this thread. Thank you again for your time and support.
Best regards,
HKana17
