Forum Discussion
Altera_Forum
Honored Contributor
8 years agoI've just re-read your original post. You've stated that CONF_DONE (FPGA_CONFIG_DONE?) does go HIGH after booting from FLASH. Is that right? If this is the case the FPGA has booted successfully.
So, I assume it doesn't behave as it does when you program it with the sof via JTAG. If this is the case I'd question whether the FPGA rails are powering up correctly. You can delay the start of AS configuration by holding nCONFIG low. Try this to delay configuration and give the rails longer to come up and settle. Cheers, Alex