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Altera_Forum
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9 years ago

Cyclone 5 custom board PLL issues

I created a board for cyclone 5 soc 5CSEBA5U19. The design behaves in a strange way. (hardware design) The JTAG chain has the HPS then the FPGA in series, like in DE1-SOC eval board. The FP...
Altera_Forum's avatar
Altera_Forum
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9 years ago

After revising the schematic, I found that there is a pin named "RREF_TL" that must be connected through 2Kohm to gnd. This resistor is not in the schematic. In the cyclone 5 pin connection guidelines, it says

"If any PLL, REFCLK pin, or transceiver channel is used, you must connect each RREF pin on that side of the device through its own individual 2.0-kΩ +/- 1% resistor to GND. Otherwise, you may connect each RREF pin on that side of the device directly to GND."

I think this is the problem.

Unfortunately I may have to re-manufacture the board again to include this resistor.

Any ideas?