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Altera_Forum
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13 years ago

Cyclone 4 GX - Transceiver - EPCS-pins cannot be used?

Hi,

we have a prototype board where we want to use REFCLK4 (Pin L10, F27-package) as reference-clock for a transciever. Now it turned out that we cannot access the EPCS-pins anymore when we use a data-rate of 2.97Gb/s (which we require).

Is there any way to make Quartus allow the usage of the EPCS pins, so that we can make at least some tests with our prototype-boards?

Thanks in advance,

Thomas

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Hi Dave,

    thank you for your suggestion. We knew this trick already and tried it, but it did not work. I think it only works for regular LVDS-pins, not for transceivers. (I have the design not here in the moment, so I cannot double-check again. We are using QII 11.1sp2, maybe another version would do?)

    Regards,

    Thomas
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    How are you interfacing to the EPCS pins?

    Have you tried specifying them as "Use as regular I/O", and then setting the toggle constraint?

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Yes, this is the way we did it.

    The only way we can get the design compiled is by setting the respective 3 configuration-pins to "Compiler configured". (DCLK is not restricted, only MISO/MOSI/CS.)

    Thanks,

    Thomas
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    File a Service Request directly with Altera and see if they have a suggestion.

    If they do come up with something that works, please post the solution here for others to see.

    Cheers,

    Dave