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Terry6's avatar
Terry6
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1 year ago

Cyclone 10 LP reverting to factory image unexpectedly

I have a design with both factory and application images. On power-up everything works as expected, the factory image is loaded, then the application image is loaded. I'm using the Remote Update (RU...
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Terry6's avatar
Terry6
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1 year ago

Yes, the re-config trigger conditions register always says what the User Watchdog Timer Timeout caused the re-config.

Given that I can't make this work reliably without extending the duration of the Avalon write pulse to 2 clocks and violating the requirements given in the RU IP databook figures, I decided to change the design and eliminate what I believe is a timing violation in the Intel provided Avalon wrapper around the RU IP.
I re-generated the RU IP core to eliminate the Avalon wrapper, then updated my state machine to control the reset_timer and other signals directly instead of through Avalon writes.

Testing on the new design structure is not complete, but is looking very promising.

  • Terry6's avatar
    Terry6
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    1 year ago

    Changing my design to directly control the RU IP has fixed the issue. If Intel is interested in pursuing the potential timing issues in the AVMM wrapper I an provide more detail on the original design, otherwise, feel free to close this ticket.

    Thanks!