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ESama's avatar
ESama
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6 years ago

Cyclone 10 GX Transceiver PHY in PCS Direct vs Enhanced

Hello I 'm working on an Intel Cyclone 10 GX developpement kit board with a native Transceiver PHY (Arria 10/cyclone 10) IP. When I configure the transceiver in a "PCS Direct" mode every thing is O...
ESama's avatar
ESama
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6 years ago

Hi dlim

Thank you very much for your answer.

At this stage, the reason why I want to use the Enhanced PCS (as compared to the Direct PCS) is the possibilty to have a fifo between pma and the fpga fabric. To do so, I choose the following options in the Transceiver PHY IP editor:

  • Transceiver configuration rules : Basic (Enhanced PCS)
  • Data rate : 5250
  • Enhanced PCS/PMA interface Width : 64
  • FPGA/FAbric/ Enhanced PCS interface Width : 64
  • TX FIFO Mode : Phase Compensation (for both tx and rx)

All the other parameters of the Enhanced PCS are the default values given in the IP editor

The data I get at the tx serial port (observed with a high speed oscilloscope) is always a continuous sequence of 111110001111100011111000.... whatever the data set at the parrallel port.

The data I get at the rx parralel port is a constant.

I set the tx_control register to 2'b01 but I not sure to understand the usefullness of that tx_control register. In any case whatever the value I have, I get the same pb.

I don't use "dynamic reconfiguration".

Thank you for your help !

Best regards

Etienne