Cyclone 10 GX FPGA Configuration Error

We solved the issue -- You can see in the schematic we used LEDs with series 100 ohm resistance to observe the open-drain status outputs nSTATUS and CONF_DONE. We did not realize these pins are also sampled as logic level inputs during configuration, meaning they need to respect the V_IH input high requirement in order for configuration to succeed.

Replacing the LED and 100-ohm resistor with just a 10k pull-up resistor (as recommended in the design guidelines) solved the issue and then configuration occurs normally. Apparently there is enough current flowing through the LED when the open-drain outputs are released high, that the pin still reads as a logic low, interfering with the configuration process.