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Altera_Forum's avatar
Altera_Forum
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7 years ago

Cyclone 10: definition of "POR time"

I am looking for the definition of "POR time". What does it mean? What happens at the beginning and at the end of the POR time interval? The term is used in the following context: "The MSEL pin...
Altera_Forum's avatar
Altera_Forum
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7 years ago

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POR Specifications:

Power-on reset (POR) delay is defined as the delay between the time when all the power supplies monitored by the POR circuitry reach the minimum recommended operating voltage to the time when the nSTATUS is released high and your device is ready to begin configuration.

--- Quote End ---

Look for "POR Specifications" in (for example) the "cyclone® 10 gx device datasheet (https://www.altera.com/en_us/pdfs/literature/hb/cyclone-10/c10gx-51002.pdf)"

Cheers,

Alex
  • xytech's avatar
    xytech
    Icon for Contributor rankContributor
    7 years ago

    Hi, Alex. Is there any specification about Tramp? Does it mean time interval between 10%-90% of nominal voltage of an FPGA power rail ?