Cyclone® V SE 5CSEBA6U23I7 have sleep or low-power mode?

Hello,

I have a question, does the Cyclone® V SE 5CSEBA6U23I7 have sleep or low-power mode?

In the P345 of Cyclone V Hard Processor System Technical Reference Manual: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v4.pdf?wapkw=Cyclone%20V%20device%20handbook , it describes the Low-power mode can be enabled by setting the cclk_low_power bit of the clkena register to 1.

In the P12 of Cyclone V Device Overview manual, the low-power mode is a power option, as shown in the L letter in the FPGA chip. But there isn't letter L in the Cyclone® V SE 5CSEBA6U23I7, that's mean this FPGA hasn't low-power mode?

Appreciate if anyone can explain this, thanks in advance.