CYCLON V + DDR3 RAM reset/clock problems within BeMicro CV board

I followed the instructions from you but the problem still exists.

Enclosed, find the Qsys-file. I also figured out, that there is a

CYCLON V PLL bug in the first silicon version and it is also described

in the ALTERA Errata Sheet for Cyclone V Devices.

http://www.altera.com/literature/es/es_cyclone_v.pdf

All my BeMicro CV boards are equipped with known bad CYCLON V silicon.

Too bad for me. My question: Is there a solution available and not only a Workaround ?

Can I get my BeMicroCV boards replaced from ALTERA? Any Any idea is welcome.

Regards, Reinhard