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Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- -when we ignore freq_locked, we still get a constant ffh, -I checked the datasheet and it seems that while the altgx supports Lvds, it's with an 0.82 vcm so it is probably holding a constant '1', the optical transciever is AC coupled so sending a constant bit will simply disconnect it which is why we thought t he fpga gets valid data. Is there anything we can do? --- Quote End --- This is the root cause of your problem. You can DC-couple LVDS signals into the OCT, i.e., the *internal* on-chip termination. You cannot use an external termination and DC-couple the signals, because the LVDS signal swing is then 1.25V +/- 200mV (or so), so the minimum LVDS logic level is higher than the receiver common-mode voltage. --- Quote Start --- the other thing is that we disabled Rref so we can't use internal termination since it has no refference resistors --- Quote End --- Ok, so OCT needs the RREF resistor. Is there any way you can add an external OCT reference resistor? If not, then you will have to create your own external termination network such that it looks like a 100-ohm differential termination with a common-mode of 0.82V These types of networks are commonly used when you need to interface say LVPECL to LVDS. I don't want to spoil your learning experience by pointing you to the answer. See if you can figure it out what I am describing, and let me know if you cannot. Hint: there is a TI app note :) Cheers, Dave