Critical Warning (16248): pin is placed too close with ADC pins.

The drive strength and slew rate warnings will be issued just to let you know that you did not explicitly set a value and will thus get the default value. If that's what you want then you can suppress those warnings, or better yet do what you did and explicitly add the assignments using the pin planner, assignment editor, or typing into your .qsf file (which Intel will probably discourage). If you choose to edit your .qsf directly then the safest way is to close your project since QuartusII typically has the file open as long as the project is open so you can get into contention and lose your edits or corrupt the file.

The ADC pin placement warning is real. It's letting you know that the digital pin could introduce noise into the analog input and degrade your conversion. So if you don't move that pin then your system will function but your A/D conversions may include added noise from the digital domain. If you have a board already done then I would suggest you oversample and filter that channel to compensate for the noise. If you don't have a board then you should move the offending pin. Keep in mind that "too close" may mean on the die, not just the package. For that reason you may slide the pin a row/column away from the analog input and still get the warning. Iteratively bump/move your pins (the pin planner is best for this) until you get a clean compile free of that warning.

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