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Altera_Forum
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7 years ago

Create own Avalon MM-Slave

Hi there I'm trying to create my first Avalon MM-Slave which should be accessible through a NIOS II softcore. In the end I just want a MM-Slave which has a conduit input and output for connecti...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

I did some testing today and modified the component to my needs. It seems that the bus now works with IORD and IOWR. But I'm still struggling with the address signal. When writing to the component the address signal is still not right. I used the following line in NIOS II software to write dummy data to the component: 

IOWR(SYSTEM_CPU_SERIAL_INTERFACE_2_0_BASE, 1, 0xbeef);

The offset I use is 1 but the address signal swaps between 2 and 3 (see attached component_wirte.jpg). The same happens when reading from the component (see attached component_read.jpg, used an offset of 5), the address signal is not correct and swaps.