Altera_Forum
Honored Contributor
7 years agoCreate a on-chip memory with logic resources
Is it possible to create on-chip memory with logic resources in Altera FPGA when there's no enough on-chip RAM?
For example, using VHDL language: type memory_type is array (0 to 15) of std_logic_vector(31 downto 0); signal memory:memory_type; If I create a very large memory with logic resources, will it have a huge influence on the process of synthesis and fitter? That means, will it slow the process? Thanks.