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Altera_Forum
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17 years ago

CRC_ERROR and memory parity bits in new FPGAs

Hello,

It appears that the CRC_ERROR and memory parity bits features have been introduced by Altera in the Stratix family (Cyclone too) and aren't available in older devices. Is this correct ?

What other reliability features have appeared in newer families and are absent in older ones ?

thanks in advance

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    --- Quote Start ---

    Hello,

    It appears that the CRC_ERROR and memory parity bits features have been introduced by Altera in the Stratix family (Cyclone too) and aren't available in older devices. Is this correct ?

    What other reliability features have appeared in newer families and are absent in older ones ?

    thanks in advance

    --- Quote End ---

    Bump. Any ides ?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    What do you mean with memory parity? The fact that the RAM modules now feature 9k bits instead of 4k? This is not necessarily a parity bit, thus, a reliability feature. You can use this bit for whatever you want.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    --- Quote Start ---

    What do you mean with memory parity? The fact that the RAM modules now feature 9k bits instead of 4k? This is not necessarily a parity bit, thus, a reliability feature. You can use this bit for whatever you want.

    --- Quote End ---

    My understanding was that memory bytes can now come in quantas of 9-bit, which, while doesn't force us to use it for parity, nevertheless makes it simpler.