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Altera_Forum
Honored Contributor
Honored ContributorCRC_ERROR and memory parity bits in new FPGAs
Hello, It appears that the CRC_ERROR and memory parity bits features have been introduced by Altera in the Stratix family (Cyclone too) and aren't available in older devices. Is this correct ? ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Hello, It appears that the CRC_ERROR and memory parity bits features have been introduced by Altera in the Stratix family (Cyclone too) and aren't available in older devices. Is this correct ? What other reliability features have appeared in newer families and are absent in older ones ? thanks in advance --- Quote End --- Bump. Any ides ?
