CRC blocks 0 / 1 (Fitter Resource Usage Summary)

Hi,

See Application Note 539.

AN 539: Test Methodology of Error Detection and Recovery using CRC in

Altera FPGA Devices.

Page 7:

Using the Error Detection CRC Feature.

You can use a "CRC Block WYSIWYG Atom" to interface from

user logic to the error detection circuit.

There is a Template under "C:\altera\81\quartus\libraries\vhdl\wysiwyg"

------------------------------------------------------------------

-- cycloneiii_crcblock parameterized megafunction component declaration

-- Generated with 'mega_defn_creator' loader - do not edit

------------------------------------------------------------------

component cycloneiii_crcblock

generic (

lpm_type : string := "cycloneiii_crcblock" );

port (

clk : in std_logic := '0';

crcerror : out std_logic;

ldsrc : in std_logic := '0';

regout : out std_logic;

shiftnld : in std_logic := '0'

);

end component;