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Altera_Forum's avatar
Altera_Forum
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12 years ago

CPLD selection suggestion

Hi, We want to interface two devices (A and B) working at 148.5MHz. The first device (A) gives out data at the negative edge and the second device (B) captures at the positive edge. The cl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thanks for the update. I now better understand multi-cycle exceptions.

I played around with the code a bit. If I refactor 'B' into the clocked process in stead of using 'rb' TimeQuest says the design doesn't meet the timing. Anything fundamental I'm overlooking?

We can eliminate the 'rb' register and directly assign 'B' from 'ra'. This may possibly allow using a smaller device. I also played around using a variable -> same results.