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Altera_Forum's avatar
Altera_Forum
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12 years ago

CPLD selection suggestion

Hi, We want to interface two devices (A and B) working at 148.5MHz. The first device (A) gives out data at the negative edge and the second device (B) captures at the positive edge. The cl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

You could possibly do that, but you would essentially have 2 clock domains in the device, so you would need to pass the data safely between then, usually using a FIFO, so it will add a small amount of latency.