Forum Discussion
Altera_Forum
Honored Contributor
15 years agoCounting the position of ones in a binary vector
I want to design a combinatorial circuit for an fpga which will count the position of ones in a 16 bit vector. eg1 if vector is 16'b0000_0000_0011_0101 then output should be 64'h0000_0000_0000_5...
Altera_Forum
Honored Contributor
15 years agoI found, that the pure combinational solution (without the registers implemented by josyb) results in a tpd of about 17 ns with Cyclone III. So 266 MHz would surely need pipelining.
I didn't try, if the synthesis tool will "pull-in" registers to the synthesis of the behavioral description. As previously reported in the Forum, it does e.g. in the case of a parallel divider. But most likely, you have to break the data path manually to achieve the speed requirement.