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Honored Contributor
Honored ContributorCorrect use of reset input of a FF. VHDL
Hello, In my design I will process an image. In part of my hardware I need to RESET some FLIP FLOPS when FVAL(frame valid) arrives. Is bad if I use the signal FVAL directly connected ...
Altera_ForumHonored Contributor
Honored ContributorIt's safer to use a synchronous reset instead of an asynchronous one like you are proposing. if FVAL signal is glitch free, it could work, however, i guess FVAL is synchronous to master clock and is preferable adding a synchronous reset signal to your hardware.
