Convert a 50MHz clock into 1Hz Clock

Simple question, lots of answers.

The most straighforward way is to generate a 1Hz clock by using a counter: toggle the 1Hz clock every 25_000_000 cycles of the 50Mhz clock.

A couple of issues.

First, this will require a 23 bit counter running at 50 Mhz. You can use a PLL to generate a 100 kHz clock (PLLs have lower limits) and then use a counter to generate the 1 Hz clock from the 100 kHz clock.

Also, at a 1 Hz it's not really a problem but ripple clocks are best avoided and replaced by clock enables.

reg [9:0] counter;

reg enable;

always @ (posedge clk100k)

begin

if (counter == 10'd0) counter <= 10'd100_000;

else counter <= counter - 1'd1;

enable <= counter == 10'd0;

end

always @ (posedge clk100k)

begin

if (enable) begin

// your logic here is run only once every second

end

end