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Honored Contributor

14 years ago

Constraints for placement of LVDS signals on Cyclone III device

Hello, I'm working on a design with 64 LVDS signals. The Cyclone III I'm working on is a EP3C120F768. Two signals belong to each others (one is a clock output signal and the other is a data in ...

Altera_Forum

Honored Contributor

14 years ago

The problem seems to be that the Cyclone III doesn't support output pins at the lower and upper banks. It had nothing to do that input and output pins were placed side by side.

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Constraints for placement of LVDS signals on Cyclone III device

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