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Altera_Forum
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14 years ago

Constraints for placement of LVDS signals on Cyclone III device

Hello, I'm working on a design with 64 LVDS signals. The Cyclone III I'm working on is a EP3C120F768. Two signals belong to each others (one is a clock output signal and the other is a data in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hm, are You sure You're doing 2.5V outputs on LVDS connected banks? It should allow that. Or... Hm, I can't remember, but afaik I had to use LVDS_3E_R for LVDS outputs.