Constraining ic delays

Hi RYSC..i did what you said but this was not the path i was talking about.

Here as you can see the datadelays is good but because of the clock skew my timings are failing.

Because of this clock skew i had to shift my analysis to data delays and not the report timing.

I use report_path option and check whether the data delays are within my clock periods. I dont know whether my analysis is correct but still would like you to guide me.

I am attaching the reports you wanted and yes the path is reg to out and the output port is made virtual.