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Honored Contributor
Honored ContributorConstrain combinational delay in Timequest
Hi, I am trying to design an asynchronous system using FPGAs (I know it is not advisable). I need to be able to constrain the combinational delay between a pair of nodes/keepers. Does Quartus p...
Altera_ForumHonored Contributor
Honored ContributorHi Tricky,
Can the set_max_delay command constrain the delay between two combinational components. I believe the set_max_delay command modifies the default setup relationship between two FFs Regards PD
