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Altera_Forum
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18 years ago

Connecting of two FPGAs in synchronous mode.

Hi all I must say that this is a tough one. I'm working on it about two weeks. I use a big board which includes three FPGAs. 2 Stratix-II180 and one Stratix-IIGX130. The mid FPGA is connected ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Brad

I do use the timing constraints - I use max delay attribute to verify that my numbers are correct. Pad to input register is 2.5ns and output register defined as 2.5ns. Still it doesn't work well. I suspect that it is something regarding the high load on the power supply since I toggle so many pins simultanously. What do you say about that? Is it possibe? I tried to measure the voltage on the power supply capacitors but I haven't seen something wrong.

Moti