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7 years ago

Configuring FPGA from HPS on SoCKit board

Hi everybody!

I'v managed to boot Linux from QSPI-flash on SoCKit board, but I can't configure FPGA from QSPI-flash. I'm trying to configure FPGA from preloader as shown in

GSRD v13.1- Programming FPGA from HPS.

I created 3 partitions for QSPI and wrote fpga.rbf file into /dev/mtd2, rebuilt preloader (after making changes in socfpga_common.h file) and flash it into /dev/mtd1. After powering the board I got

U-Boot SPL 2013.01.01 (Apr 10 2018 - 11:59:25)

BOARD : Altera SOCFPGA Cyclone V Board

CLOCK: EOSC1 clock 25000 KHz

CLOCK: EOSC2 clock 25000 KHz

CLOCK: F2S_SDR_REF clock 0 KHz

CLOCK: F2S_PER_REF clock 0 KHz

CLOCK: MPU clock 925 MHz

CLOCK: DDR clock 400 MHz

CLOCK: UART clock 100000 KHz

CLOCK: MMC clock 50000 KHz

CLOCK: QSPI clock 370000 KHz

RESET: COLD

INFO : Watchdog enabled

SDRAM: Initializing MMR registers

SDRAM: Calibrating PHY

SEQ.C: Preparing to start memory calibration

SEQ.C: CALIBRATION PASSED

SDRAM: 1024 MiB

FPGA : Programming FPGA

SF: Read data capture delay calibrated to 3 (0 - 7)

SF: Detected N25Q512 with page size 65536, total: 67108864

into the Linux console... I've tried MSEL="00000" and "01010", but without any success. Bootsel = "111" (boot from QSPI).

If I change the preloader to another one (without FPGA from QSPI configuring support) Linux normally starts from QSPI...

Any help will be appreciated.
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