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Honored Contributor
Honored ContributorConfiguring ADC using FPGA
I am trying to configure an ADC using an FPGA. I can read the default values from the ADC register properly, but I'm unable to write to those registers. The fpga clock is 48 MHz and serial clock ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Yes I can control the chip select. I'll certainly give that a try, set CS high during power up and then set it low after a few clock cycles. --- Quote End --- Sounds like a good debug plan. --- Quote Start --- What bothers me is I never fail to read the correct default value of a register. --- Quote End --- Never try to interpret patterns, you'll never figure them out. --- Quote Start --- For now I have to change the address value in my VHDL code, re-compile the code, and re-program the FPGA. I would think a read would be more difficult to accomplish since the SDIO line has to change from an input to an output whereas for a write, it stays as an input line. --- Quote End --- You need to write an ADC interface controller, wrap it with a Avalon-MM registers interface, drop it into an SOPC or Qsys system, and then debug. That way you can generate reads or writes to whatever addresses you like. It may seem like a lot of extra work up front, but you'll benefit from it in the long run. Go through this tutorial: http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial Cheers, Dave
