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I didn't read the data sheet completely. Take a look and see if there is a requirement to write a specific number of bytes, eg., write access to 16-bit register X must use 2-bytes otherwise write transactions will be ignored.
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All the registers in the memory map table (pg. 27) have 8-bit data.
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The other thing is that previous transactions may be screwing up the interface. Can you control the chip-select? If you can deassert it, then you can ensure you have reset the ADC internal logic.
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For now I'm only trying to perform one transaction. I either do a read or a write. For a read, I send 16-bits to the ADC (1-bit R/W + W[1:0] + Addr[12:0]) and get 8-bits back. For a write I just add 8-bits of data after the address.
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Also, do you have an ADC clock? Some devices I have used will not work correctly until you *also* have the ADC clock.
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Yes, the 48 MHz fpga clock is tied to the ADC clock.
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